
Trusted
TM
TMR Processor T8110B/T8110
Issue 18 Feb 08 PD-T8110B/T8110 19
RACK 4: [TTMRP_3 – Real time clock input rack]
6 ANALOGUE inputs
If the RTC read channel, Channel 2, of TTMRP_5 is set to TRUE, this input rack is refreshed every cycle to hold
the current date and time.
RACK 5: [TTMRP_4 – Real time clock program rack]
6 ANALOGUE outputs
This output rack (above) allows the application writer to specify a new time and date to be written to the RTC by
the RTC control rack described below. It does not perform the write itself.
RACK 6 [TTMRP_5 – Real time clock control rack]
7 BOOLEAN outputs
Channel 1 RTC Write
TRUE = Set RTC if previously FALSE
FALSE = no associated action
Channel 2 RTC Read
TRUE = Refresh RTC on every subsequent cycle
False = Stop RTC input rack refreshes for every subsequent cycle.
This output rack physically writes the date and time components assigned to the RTC program rack to the RTC.
The write operation is performed in the event of a rising edge on the RTC write channel, Channel 1. The set
channels, Channels 3 – 8, determine which date and time values to write, i.e. only date/time components that
have a corresponding TRUE set channel are written to the RTC. Other date/time components remain
unchanged. The date/time is only written to the RTC if the resulting date/time is valid, otherwise a run-time error
is generated. The RTC read channel, Channel 2, enables/disables refreshes of the RTC input rack on every
subsequent cycle.
Komentáře k této Příručce